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VMware (Broadcom) Placement Papers 2026, Questions, Answers & Complete Interview Guide

17 min read
Company Placement Papers
Last Updated: 1 May 2026
Reviewed by PapersAdda Editorial

About VMware / Broadcom

VMware is the global leader in virtualization and cloud infrastructure software, founded in 1998 by Diane Greene, Mendel Rosenblum, Scott Devine, Edward Wang, and Edouard Bugnion in Palo Alto, California. VMware's pioneering work in x86 server virtualization fundamentally transformed enterprise IT by enabling multiple virtual machines (VMs) to run on a single physical server, dramatically improving hardware utilization, reducing data center costs, and enabling modern DevOps and cloud-native development practices. VMware's flagship products, vSphere, vCenter, NSX, vSAN, and Workspace ONE, are deployed across 500,000+ enterprise customers worldwide, including 100% of the Fortune 500.

In November 2023, semiconductor and infrastructure software giant Broadcom completed its acquisition of VMware for approximately $69 billion, one of the largest technology acquisitions in history. Post-acquisition, VMware operates under Broadcom's Software Division, with the VMware brand continuing for its products. The acquisition brought significant organizational restructuring, but VMware's India development centers, primarily in Bengaluru, remain among the most strategically important engineering hubs for the combined entity. Broadcom-VMware's engineering teams in India work on vSphere hypervisor development, NSX network virtualization, Kubernetes integration (Tanzu), and cloud management platforms.

For freshers, VMware/Broadcom offers excellent opportunities in systems programming, kernel engineering, network engineering, and cloud platform development. The work is deeply technical, closer to systems software (C, C++, kernel modules) than typical web application development. The freshers CTC ranges from ₹12 LPA to ₹22 LPA, which reflects the specialized nature of the work. VMware/Broadcom is the ideal employer for freshers who want to work on low-level systems, bare-metal infrastructure, and enterprise-grade software at massive scale, problems that relatively few companies in India expose engineers to.


Eligibility Criteria

CriterionRequirement
DegreeB.E. / B.Tech / M.Tech in relevant disciplines
Eligible BranchesCSE, IT, ECE, EEE, Electronics & Instrumentation
Minimum CGPA7.0 / 10 (technical depth valued over GPA)
Active BacklogsNone at time of application
Historical BacklogsMaximum 1, cleared
Graduation Year2025 or 2026 pass-outs
Programming SkillsC/C++ strongly preferred; Python/Java also accepted
Domain KnowledgeOS fundamentals, networking, virtualization basics are significant differentiators

VMware / Broadcom Selection Process 2026

  1. Resume Shortlisting, Focus on systems programming experience, OS projects, kernel module work, networking labs, or hardware-related projects. C/C++ projects significantly boost shortlisting odds.
  2. Online Aptitude & Technical Test, 90-minute test: quantitative aptitude, logical reasoning, verbal ability, and 25–30 technical MCQs covering OS, networking, C/C++, and computer architecture.
  3. Technical Interview Round 1 (C/C++ + DSA), 60-minute live coding session. Tests C/C++ programming skills, pointer manipulation, memory management, and DSA. Questions on bit manipulation, linked lists, and sorting are common.
  4. Technical Interview Round 2 (Systems & OS), Deep-dive on operating systems (process management, memory management, file systems, synchronization), computer networking (TCP/IP, routing, VLANs), and VMware-specific concepts (hypervisor types, VM lifecycle).
  5. Technical Interview Round 3 (Design + Domain), System/component design relevant to virtualization domain. May include designing a simplified scheduler, memory allocator, or virtual switch. Breadth of systems knowledge tested.
  6. HR & Managerial Round, Cultural fit, career goals, behavioral questions. Broadcom-VMware values technical depth, ownership, and long-term commitment to infrastructure engineering.
  7. Offer & Verification, Offer letter within 2–3 weeks. Comprehensive background check required.

Exam Pattern

SectionTopics CoveredNo. of QuestionsTime Allotted
Quantitative AptitudeNumber Theory, Algebra, Geometry, Probability1520 minutes
Logical ReasoningPuzzles, Syllogisms, Directions, Coding-Decoding1015 minutes
Verbal AbilityReading Comprehension, Fill in the Blanks, Para-jumbles1015 minutes
Technical MCQ, C/C++/OSPointers, Memory, OS Concepts, Networking, Computer Architecture2530 minutes
Coding SectionC/C++ problem (Easy–Medium), Systems-flavored1–220 minutes
Total61–63~100 minutes

Note: VMware's technical MCQ section on C/C++ and OS is significantly harder than industry average. This is where most candidates are eliminated. Strong OS fundamentals are critical.


Practice Questions with Detailed Solutions

Quantitative Aptitude

Q1. A server rack has 16 physical servers. Each server can run a maximum of 8 VMs. If the current VM-to-server ratio is 5:1, how many more VMs can be deployed?

Solution:

  • Maximum VMs = 16 × 8 = 128
  • Current VMs = 16 × 5 = 80
  • Additional VMs possible = 128 − 80 = 48 VMs

Q2. A network has 256 IP addresses (Class C). 20 are reserved for system use. What percentage is available for hosts?

Solution:

  • Available = 256 − 20 = 236
  • Percentage = (236 / 256) × 100 = 92.19%

Q3. Find the LCM and GCD of 48 and 72.

Solution:

  • 48 = 2⁴ × 3; 72 = 2³ × 3²
  • GCD = 2³ × 3 = 24
  • LCM = 2⁴ × 3² = 144

Q4. A storage array has 10 TB total, 70% utilized. After a VMware vSAN thin provisioning policy, effective capacity becomes 3x. What is the new available capacity?

Solution:

  • Used = 10 × 0.70 = 7 TB; Free physical = 3 TB
  • With 3x thin provisioning, effective free = 3 × 3 = 9 TB
  • Note: Thin provisioning allocates virtual capacity without immediate physical reservation.

Q5. In a series: 256, 128, 64, 32, ___, 8

Solution:

  • Each term is divided by 2 (or multiplied by 0.5)
  • 32 / 2 = 16

Q6. What is the binary representation of the decimal number 172? And what subnet does 172.16.0.0/12 represent?

Solution:

  • 172 in binary: 172 = 128+32+8+4 = 10101100₂ = 10101100
  • 172.16.0.0/12: subnet mask = 255.240.0.0; range = 172.16.0.0 – 172.31.255.255 ✅

Q7. If process A needs resources X and Y (in that order) and process B needs resources Y and X (in that order), and both are running simultaneously, what problem can arise?

Solution:

  • This is a classic Deadlock scenario (circular wait condition)
  • A holds X, waits for Y; B holds Y, waits for X → neither can proceed
  • Four conditions for deadlock: Mutual exclusion, Hold & Wait, No preemption, Circular wait
  • Prevention: Impose a global ordering on resource acquisition (always acquire X before Y) ✅

Q8. A data center uses 3-way replication for vSAN. If a write operation completes in 50ms on primary, how long does it take before the write is acknowledged? (Assume parallel writes to replicas)

Solution:

  • With parallel writes (synchronous replication), the write completes when ALL replicas acknowledge.
  • Slowest replica determines completion time.
  • If replicas add 10ms network latency each: completion ≈ 50 + 10 = ~60ms (assuming parallel replication with network overhead) ✅
  • This tests understanding of replication consistency models.

C/C++ Technical Questions

Q9. What is the output of this C code?

#include <stdio.h>
int main() {
    int arr[] = {10, 20, 30, 40, 50};
    int *ptr = arr;
    printf("%d\n", *(ptr + 2));
    printf("%d\n", *(ptr++));
    printf("%d\n", *ptr);
    return 0;
}

Solution:

  • *(ptr + 2): ptr points to arr[0]=10; ptr+2 points to arr[2]=30 → prints 30
  • *(ptr++): returns *ptr first (arr[0]=10), THEN increments ptr → prints 10
  • *ptr: ptr now points to arr[1] → prints 20
  • Output:
30
10
20

Key concept: Pointer arithmetic and post-increment behavior, critical VMware C interview topic. ✅


Q10. What is the difference between a process and a thread? How does VMware's hypervisor handle these?

Solution:

  • Process: Independent execution unit with its own address space, file descriptors, and resources. Inter-process communication requires IPC mechanisms (pipes, sockets, shared memory).
  • Thread: Lightweight unit within a process. Shares address space (heap, global data) but has its own stack and registers. Context switching is faster.
  • In VMware's ESXi hypervisor context: The hypervisor (VMM, Virtual Machine Monitor) manages VMs similarly to how an OS manages processes. Each VM has its own virtual CPU (vCPU), virtual memory, and virtual I/O, the hypervisor multiplexes physical resources among VMs using techniques like NUMA-aware scheduling and memory ballooning.
  • VMware's vSphere uses a Type 1 (bare-metal) hypervisor, it runs directly on hardware without a host OS layer. ✅

Coding Questions

Q11. Implement a memory pool allocator in C (simplified).

Solution (C):

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#define POOL_SIZE 1024
#define BLOCK_SIZE 64

typedef struct {
    char pool[POOL_SIZE];
    int free_blocks[POOL_SIZE / BLOCK_SIZE];
    int num_blocks;
} MemoryPool;

void init_pool(MemoryPool *mp) {
    mp->num_blocks = POOL_SIZE / BLOCK_SIZE;
    for (int i = 0; i < mp->num_blocks; i++)
        mp->free_blocks[i] = 1;  // 1 = free
}

void* pool_alloc(MemoryPool *mp) {
    for (int i = 0; i < mp->num_blocks; i++) {
        if (mp->free_blocks[i]) {
            mp->free_blocks[i] = 0;
            return mp->pool + (i * BLOCK_SIZE);
        }
    }
    return NULL;  // Out of memory
}

void pool_free(MemoryPool *mp, void *ptr) {
    int offset = (char*)ptr - mp->pool;
    int block = offset / BLOCK_SIZE;
    if (block >= 0 && block < mp->num_blocks)
        mp->free_blocks[block] = 1;
}

int main() {
    MemoryPool mp;
    init_pool(&mp);
    char *buf1 = (char*)pool_alloc(&mp);
    strcpy(buf1, "VMware ESXi");
    printf("%s\n", buf1);  // VMware ESXi
    pool_free(&mp, buf1);
    return 0;
}

Relevance: VMware kernel engineers work with custom memory allocators, this is a foundational concept. ✅


Q12. Write a C program to detect and find the start of a cycle in a linked list.

Solution (C):

#include <stdio.h>
#include <stdlib.h>

struct Node {
    int data;
    struct Node* next;
};

struct Node* find_cycle_start(struct Node* head) {
    struct Node *slow = head, *fast = head;
    
    // Detect cycle
    while (fast && fast->next) {
        slow = slow->next;
        fast = fast->next->next;
        if (slow == fast) {
            // Cycle found — find start
            slow = head;
            while (slow != fast) {
                slow = slow->next;
                fast = fast->next;
            }
            return slow;  // Start of cycle
        }
    }
    return NULL;  // No cycle
}

Algorithm: Floyd's cycle detection + mathematical proof for finding cycle entry point. Time: O(n), Space: O(1) ✅


Q13. Implement a simple virtual memory page replacement using the LRU algorithm.

Solution (Python, for readability):

from collections import OrderedDict

class LRUPageReplacement:
    def __init__(self, capacity):
        self.capacity = capacity
        self.frames = OrderedDict()
        self.page_faults = 0

    def access_page(self, page):
        if page in self.frames:
            self.frames.move_to_end(page)
            print(f"Page {page}: HIT  | Frames: {list(self.frames.keys())}")
        else:
            self.page_faults += 1
            if len(self.frames) >= self.capacity:
                evicted = self.frames.popitem(last=False)
                print(f"Page {page}: MISS | Evicted: {evicted[0]}", end=" ")
            self.frames[page] = True
            print(f"| Frames: {list(self.frames.keys())}")

# Simulate page accesses
lru = LRUPageReplacement(capacity=3)
for page in [1, 2, 3, 4, 1, 2, 5, 1, 2, 3]:
    lru.access_page(page)
print(f"Total Page Faults: {lru.page_faults}")

VMware relevance: Memory management and page replacement directly relates to how ESXi manages VM memory (balloon driver, TPS, swap). ✅


Q14. Write a multithreaded producer-consumer in C using POSIX threads and mutex.

Solution (C):

#include <stdio.h>
#include <pthread.h>
#include <semaphore.h>

#define BUFFER_SIZE 5
int buffer[BUFFER_SIZE];
int in = 0, out = 0;

pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER;
sem_t empty_slots, full_slots;

void* producer(void* arg) {
    for (int i = 1; i <= 10; i++) {
        sem_wait(&empty_slots);
        pthread_mutex_lock(&mutex);
        buffer[in] = i;
        printf("Produced: %d\n", i);
        in = (in + 1) % BUFFER_SIZE;
        pthread_mutex_unlock(&mutex);
        sem_post(&full_slots);
    }
    return NULL;
}

void* consumer(void* arg) {
    for (int i = 0; i < 10; i++) {
        sem_wait(&full_slots);
        pthread_mutex_lock(&mutex);
        int item = buffer[out];
        printf("Consumed: %d\n", item);
        out = (out + 1) % BUFFER_SIZE;
        pthread_mutex_unlock(&mutex);
        sem_post(&empty_slots);
    }
    return NULL;
}

int main() {
    sem_init(&empty_slots, 0, BUFFER_SIZE);
    sem_init(&full_slots, 0, 0);
    pthread_t prod_thread, cons_thread;
    pthread_create(&prod_thread, NULL, producer, NULL);
    pthread_create(&cons_thread, NULL, consumer, NULL);
    pthread_join(prod_thread, NULL);
    pthread_join(cons_thread, NULL);
    return 0;
}

Critical concept: VMware engineers routinely work with multithreading, mutex, and semaphores in kernel-level code. ✅


Q15. Explain and implement the concept of virtual-to-physical address translation (simplified page table).

Solution (Python, Conceptual Implementation):

class PageTable:
    def __init__(self, page_size=4096):
        self.page_size = page_size
        self.table = {}  # virtual page number -> physical frame number
        self.next_frame = 0

    def map_page(self, vpn):
        """Map a virtual page number to a physical frame."""
        if vpn not in self.table:
            self.table[vpn] = self.next_frame
            self.next_frame += 1
        return self.table[vpn]

    def translate(self, virtual_address):
        """Translate virtual address to physical address."""
        vpn = virtual_address // self.page_size     # Page number
        offset = virtual_address % self.page_size   # Offset within page
        pfn = self.map_page(vpn)                    # Physical frame number
        physical_address = (pfn * self.page_size) + offset
        return physical_address

# Demonstration
pt = PageTable(page_size=4096)
va1 = 8500   # Virtual address
pa1 = pt.translate(va1)
print(f"Virtual: {va1} -> Physical: {pa1}")
# VPN = 8500//4096 = 2, offset = 8500%4096 = 308, PFN=2, PA = 2*4096+308 = 8500 (trivial mapping)

va2 = 4200
pa2 = pt.translate(va2)
print(f"Virtual: {va2} -> Physical: {pa2}")
print(f"Page Table: {pt.table}")

VMware Relevance: This is literally what VMware's EPT (Extended Page Tables) and VMCS do in hardware-assisted virtualization. Understanding address translation is foundational for VMware roles. ✅


HR Interview Questions & Sample Answers

Q1. Why do you want to work on virtualization and systems software at VMware/Broadcom?

Sample Answer: "Virtualization is foundational infrastructure, every cloud, every containerized app, every modern data center runs on the abstraction layers that VMware pioneered. I'm drawn to systems programming because it's where software meets hardware, the problems are hard, the constraints are real (memory, CPU cycles, latency), and the impact is massive. VMware's ESXi hypervisor running in 100% of Fortune 500 data centers means a bug I fix or a feature I build has real-world consequences at extraordinary scale. That's the kind of work I want to do."


Q2. How comfortable are you with C and low-level programming? How have you used it?

Sample Answer: "Very comfortable. In my OS course project, I implemented a simplified memory allocator in C, managing a fixed-size heap with free list management, coalescing adjacent free blocks, and handling alignment. I also built a basic shell with fork/exec/pipe support. Beyond coursework, I've read portions of the Linux kernel source to understand interrupt handling and the VFS layer. I understand pointers, memory layout, stack vs. heap, and common pitfalls like buffer overflows and dangling pointers. C's directness and the responsibility it places on the programmer is something I genuinely enjoy."


Q3. Describe the most complex technical concept you've ever learned. How did you approach it?

Sample Answer: "For me, it was understanding how virtual memory works end-to-end, from virtual addresses in a program, through TLB lookups, to page table walks, page faults, demand paging, and the interaction with swap space. I started with the theory (Patterson & Hennessy's textbook), then traced actual Linux kernel code for the fault handler, then wrote a small program that deliberately triggered page faults and observed the behavior with /proc. Finally, I built a simplified simulation in C. Taking something abstract and building from theory to implementation to observation is my standard approach to complex topics."


Q4. How do you handle working on a legacy codebase with millions of lines of code?

Sample Answer: "Strategically and humbly. My first step is understanding the system's architecture at 30,000 feet, the major components, their interfaces, and data flows. Then I focus on the specific area I need to change. I use tools like grep, ctags, and IDE navigation to trace code paths. I write tests before touching anything. Most importantly, I treat the existing code with respect, it often encodes institutional knowledge that isn't documented. If something looks odd, I investigate why before changing it. Code reviews and pair programming with senior engineers are invaluable when navigating unfamiliar large codebases."


Q5. Where do you see infrastructure/virtualization technology going in the next 5 years?

Sample Answer: "I see three major trajectories: First, the convergence of VMs and containers, Kubernetes is winning for stateless workloads, but VMs still dominate for stateful enterprise apps. Technologies like Kata Containers and VMware's Tanzu are bridging this gap. Second, confidential computing, with AMD SEV and Intel TDX, VMs can be cryptographically isolated even from the hypervisor, which is transformative for regulated industries. Third, edge virtualization, as 5G expands, VMware-style infrastructure is moving to telco edges and factory floors. The core virtualization expertise remains deeply relevant but the deployment context is radically expanding."


Preparation Tips

  • Master C and C++ deeply: VMware's codebase is primarily C and C++. Practice memory management (malloc/free, RAII), pointer arithmetic, struct packing, bit fields, and systems-level debugging (valgrind, gdb).
  • Study Operating Systems thoroughly: Use the "Three Easy Pieces" (OSTEP) book (free online). Focus on process scheduling, virtual memory, file systems, synchronization primitives, and deadlock. This is VMware's core competency.
  • Learn basic networking: Understand TCP/IP stack, Ethernet, VLANs, routing (BGP, OSPF at a conceptual level), and network virtualization (VXLAN, software-defined networking). NSX is VMware's key networking product.
  • Understand virtualization concepts: Know the difference between Type 1 (bare-metal) and Type 2 (hosted) hypervisors, para-virtualization vs full virtualization, hardware-assisted virtualization (Intel VT-x, AMD-V), and container vs VM tradeoffs.
  • Practice bit manipulation: VMware technical interviews frequently include bit manipulation problems (set/clear/toggle a bit, count set bits, find single non-duplicate). Master these.
  • Review computer architecture: Cache hierarchy (L1/L2/L3), NUMA, memory alignment, CPU pipeline, interrupts, and DMA are all relevant to VMware's systems engineering roles.
  • Study VMware products: Explore the free VMware Workstation/ESXi trial. Create a VM, understand VMDK files, snapshots, and vMotion. Hands-on experience is a genuine differentiator.

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Frequently Asked Questions (FAQ)

Q1: How has the Broadcom acquisition affected VMware hiring in India? Post-acquisition, VMware India continues to hire for core engineering roles, though at a more selective pace than 2022–2023. The Bengaluru office remains strategically important for vSphere, NSX, and cloud platform development.

Q2: Does VMware/Broadcom hire freshers for kernel/systems programming roles directly? Yes, but these roles are rare and highly competitive. Most freshers join in application software or cloud platform roles and transition to systems programming after demonstrating proficiency. However, candidates with strong OS projects and C/C++ skills can directly apply for systems engineering tracks.

Q3: Is Python or Java acceptable for VMware coding interviews, or is C/C++ mandatory? Python and Java are accepted for the coding section, but demonstrating C/C++ knowledge in the technical discussions strongly differentiates you. The technical MCQ section tests C-specific concepts regardless of your coding language choice.

Q4: What is the typical career growth path at VMware/Broadcom for freshers? MTS (Member of Technical Staff) → Staff Engineer → Senior Staff Engineer → Principal Engineer. Typical timeline: MTS to Staff = 2–3 years; Staff to Senior Staff = 3–4 years. Technical depth is more valued than people management in VMware's IC track.

Q5: Does VMware/Broadcom provide any specific training for freshers on virtualization technology? Yes. VMware has robust internal training programs including VMware Education certifications (VCP, vSphere, NSX). New hires typically receive structured onboarding including product training, architecture deep-dives, and access to internal learning platforms before being assigned to production codebases.


Last updated: March 2026 | Source: VMware Careers, Broadcom Engineering Blog, Glassdoor India, GATE/OS study resources, student interview experiences on PrepInsta and Blind

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